The present invention relates to an adaptive power limiter circuit. More particularly, the invention relates to an FET adaptive limiter with high current FET detector.
A field effect transistor (FET) is a three terminal semiconductor amplifier, which may be obtained in two polarities for use with either polarity of supply voltage. An ordinary bipolar transistor uses a current into its base terminal to control a larger current between its emitter and collector.
A FET uses a voltage on the `gate` (=base) terminal to control the current between its `source` (=emitter) and `drain` (=collector). Therefore, a bipolar transistor gain is characterized as a current gain, whereas the FET gain is characterized as a transconductance, or mutual conductance g.sub.m, that is, the ratio of change in output (drain) current to input (gate) voltage, usually expressed either in milliamperes per volt (mA/V) or micromhos (.mu. mho) where 1000 mho=1 mA/V. The FET also differs from the bipolar transistor in the input gate impedance compared with transistor base impedance. In the transistor, the base input corresponds to a forward-biased diode with an impedance of typically hundreds or thousands of ohms. In the FET the input impedance corresponds to a reverse-biased diode, or an insulator, at tens of megohoms upwards. FETs were originally known as "unipolar" transistors, because their action is governed by only one type of internal current carrier, either the hole or the electron, depending on the device polarity. Ordinary transistors were distinguished as "bipolar", because the device currents are conducted by two types of carriers, that is, both electrons and holes, whatever the device polarity.
Junction gate, depletion insulated gate, and enhancement insulated gate FETs work in slightly different ways, although they all depend on the field effect, in which a voltage applied to a gate controls the resistance of a semiconductor channel between the source and the drain.
Monolithic microwave integrated circuit (MMIC) FETs are severely damaged by high power microwave (HPM) pulses electrostatic discharge (ESD) and electromagnetic pulses (EMP).
The principal object of the invention is to provide a an FET adaptive limiter for suppressing power spikes reliably and effectively.
An object of the invention is to provide an FET adaptive limiter of simple structure which efficiently, effectively and reliably suppresses power spikes.
Another object of the invention is to provide an FET adaptive limiter which suppresses power spikes to protect against wideband high power microwaves, electromagnetic pulses (EMP) and electrostatic discharge (ED).
Still another object of the invention is to provide an L band MMIC limiter with an integral peak detector circuit.
Yet another object of the invention is to provide an FET adaptive limiter circuit which provides a 55 dB suppression of a 50 watt CW signal with 0.3 nJoule spike energy.
Another object of the invention is to provide an FET limiter with a subnanosecond attack time.
Still another object of the invention is to provide a power limiter having low insertion loss when in standby mode.
Yet another object of the invention is to provide an FET adaptive limiter which enables its FET to protect the low noise amplifier (LNA) from high energy HPM without degrading its ultrafast spike suppression capability.
Still another object of the invention is to provide an FET adaptive limiter which suppresses power spikes efficiently and effectively and provides extremely rapid recovery, in the range of 25 to 50 ns, and minimizes HPM blinding of a receiver in which it is installed.
Yet another object of the invention is to provide a FET adaptive limiter which reduces, by a factor of at least two, the average power dissipated in the circuit FET and thereby provides continuous protection from high energy signals and/or CW HPM.